The present invention relates to a nonvolatile semiconductor memory device.
In a nonvolatile semiconductor memory device, an input buffer is arranged in order to amplify a control signal or a data signal input from the outside to “0”/“1” of a CMOS level. For example, as a configuration of an input buffer of a NAND flash memory and so on, a circuit configuration having an inverter may be adopted.
The input buffer corrects circuit threshold value voltages by determining a β ratio of a PMOS transistor and an NMOS transistor provided in an inverter, for example, through connection/disconnection of an interconnection layer mask. Here, the β ratio is defined as a ratio of channel widths W of the PMOS transistor and the NMOS transistor.
However, the adjustment of the β ratio is limited in the configuration of the input buffer or a method of correcting its circuit threshold value, and thus it cannot cope with individual primary factors, such as differences in the threshold value of transistors for respective chips, the change of a power supply voltage in use, and the like. Due to this, duty error of the input buffer is increased.
Here, the duty error is defined as a deviation (difference) between an input duty ratio and an output duty ratio. The duty ratio is defined as a time ratio of an “H”-level signal period and an “L”-level signal period.
If the duty error of the input buffer is increased, setup/hole margin deterioration or a difference in output data window occurs, and thus a high-speed data input/output cannot be achieved. Accordingly, the performance of a nonvolatile semiconductor memory device may deteriorate greatly.